The invention relates to a multilayer wiring substrate for packaging a plurality of electronic elements.
An example of prior art multilayer wiring substrates is disclosed in U.S. Pat. No. 4,652,970. The disclosed substrate includes an alumina ceramic substrate 1, wiring layers 2 made of an organic material, through-holes 12 penetrating the substrate 1, a power supply wiring layer 13 and a ground wiring layer 14. Since the layers 13 and 14, and the through-holes 12, each of which is connected to either the layer 13 or 14, are formed within the substrate 1 of a high relative dielectric constant, the voltage reduction over the layers 13 and 14 and across the through-holes 12 can be kept low. However, because the through-holes 12 are formed within the substrate 1 having the high relative dielectric constant, a signal-propagation delay time through some of the through-holes 12, which are used for signal transmission, increases inevitably.